RADAR: A Skew-resistant and Hotness-aware Ordered Index Design for Processing-in-memory Systems

Yifan Hua, Shengan Zheng*, Weihan Kong, Cong Zhou, Kaixin Huang, Ruoyan Ma, Linpeng Huang*
Published in IEEE Transactions on Parallel and Distributed Systems (TPDS), 2024

Abstract: Pointer chasing becomes the performance bottleneck for today’s in-memory indexes due to the memory wall. Emerging processing-in-memory (PIM) technologies are promising to mitigate this bottleneck, by enabling low-latency memory access and aggregated memory bandwidth scaling with the number of PIM modules. Prior PIM-based indexes adopt a fixed granularity to partition the key space and maintain static heights of skiplist nodes among PIM modules to accelerate index operations on skiplist, neglecting the changes in skewness and hotness of data access patterns during runtime. In this paper, we present RADAR, an innovative PIM-friendly skiplist that dynamically partitions the key space among PIM modules to adapt to varying skewness. An offline learning-based model is employed to catch hotness changes to adjust the heights of skiplist nodes. In multiple datasets, RADAR achieves up to 198.2x performance improvement and consumes 47.4% less memory than state-of-the-art designs on real PIM hardware.

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